Relay bypass: to latch or not to latch...

[Yogi B]

This is first of a few threads, in which the aim is to solidify the design of a general purpose effects wrapper that handles both power and signal i/o. (Or maybe the aim is to get myself told to stop overthinking this.)

From the thread title it should be obvious that particular thread concerns the latter (signal i/o) and relay bypassing (with the logic governed by a microcontroller). Currently there are three major concerns: current draw, circuit/logic complexity, and bypass upon power-loss.

Current Draw

A latching relay clearly wins the first category, requiring only short pulses of current to set the switch to either of the stable positions and otherwise zero current draw.

On the other hand, a non-latching relay requires continuous current through its coil in order to maintain the switch in the non-stable position (most sensibly the position in which effect is active). Most non-latching schemes I've seen use relays specced at around 30mA @ 5V, which in many cases will account for more current than the rest of the circuit combined. However, Panasonic make a line of "high sensitivity" relays which only require around 12mA @ 5V or (if one were to use a higher rated relay running off the main power rail) just 5.6mA @ 9V — this is closer to being acceptable, but we can still go further.

Typically a non-latching relay need only be run at its full rated voltage whilst being actuated; once set this can be reduced: less current is needed to hold the switch in place. According to the Panasonic datasheet the maximum drop-out voltage is below 30%, (after adding some margin) this means it should be possible to have a holding current to around 2mA. I am, however, concerned that doing this presumably must also derate the relay's vibration/shock resistance, but I don't think I've ever seen such a derating specified on any relay's datasheet.

Complexity

The mono-stable nature of a non-latching relay offers simplicity, in that all one has to do in order to reset the relay is stop drawing current through it. As such a non-latching relay ties up the use of at most one GIPO pin — whereas latching relay (whether single or dual coil) would use, by default, two pins — it could be made to use a single pin, but this introduces extra complexity.

A circuit for a non-latching relay can still get relatively complex if wanting to automatically reduce the supplied current to the holding current, especially if you're worrying about minimum set/reset cycle time. If so, you end up with something like this:

When power is applied, and with Q3 turned on, current flows through C1 into the base of Q1 turning it on — thereby giving approximately 9V across (and 5.6mA through) the relay coil K1. As C1 charges the the current through both it and the base of Q1 reduces, eventually turning off the transistor and introducing R1 in series with K1 lowering the current to about 2mA. (When simulated with the shown values and a 2N3904, Q1 begins to turn off at about 20ms.)

Removing power (or turning off Q3) discharges C1. Without Q2, R4 and with D2 replaced with a short, the only path though which C1 could discharge would be via K1, R1 & R3, this current would slow the release of K1: taking around 70ms to decay below the relay's must-release threshold of 560uA. Therefore the current from C1 discharging is instead routed into the base of Q2, turning it on and allowing the cap to discharge much more rapidly via R4 (possibly too fast?). The purpose of diode D2 is to keep Q2 turned on harder for longer, by preventing any (significant) current from bypassing Q2's B-E junction via R3.

Bypass Upon Power-Loss

This is somewhat related to the previous category — a non-latching relay by its very nature gets this for free, to impose this requirement upon a latching relay adds extra circuit complexity. And sure, while it'd be a nice-to-have, I'm not convinced it'd really be that useful.

First one must detect loss of power, then act upon that knowledge whilst the filter caps still hold sufficient charge. Plus, one has to consider if at that specific moment it is okay to attempt to switch the relay: is it in the process of already being switched? Even after the relay is reset, it's not over — any further attempts to re-engage the relay must be blocked also. How complex this gets again is inversely proportional to the number of GPIO pins used: theoretically it would be possible to use the loss of power to trigger a complete bypass the microcontroller and manually reset the relay — however, signalling the μC and doing the logic in code rather than circuitry would be preferable.

Below is one idea/hack which only uses about an extra 6% of a pin. It adds a couple of components (R1 & the IDC) to R. G. Keen's Advanced Power Switching and Polarity Protection for Effects in order to make the P-MOSFET into an "ideal" diode. Then the gate & source of Q2 are paralleled with those of Q3, such that the two are switched simultaneously: both are on when Vin > V+, both off otherwise. Turning off Q3 also turns off Q4, this does two things: firstly turning on Q5, which has the same effect as holding closed the footswitch with which it shares the input pin; secondly, the reset pin is pulled up to the full 5V from its previous value of a smidge under 4.7V — this is enough such that the microcontroller can differentiate this event from an actual footswitch actuation. Voltages below 4.5V may trigger a reset, 4.7V gives a little wiggle room while still giving about six bits between that value and the 5V maximum (analogue input typically has 10-bit resolution).

[sumgai]

Yogi,



OK, I think I can help here. But be aware that I'm suffering another kidney stone, and boy oh boy, every time I get one of these, the drugs just get better and better. Hopefully I won't go off the rails here. (Or if I do, it at least it doesn't come out as counterproductive....)

My first impulse was to suggest something, but I then read all the way through your post, whereupon I realized that I should frame it as a question. Thus:

Are you in love with mechanical contact relays? If not, or at least not completely so, then would you consider a digital solution? And of course, there's the bit about power-loss bypass, which cannot be implemented via digital, it pretty much must be a mechanical relay.... which puts us in the territory of a hybrid solution. What ratio of mechanical versus solid state remains to be seen, of course.

Reminder: The more solid the state, the less draw on the power supply. But I do think you've found some rather nice relays for this purpose, spec-wise. Also, I'm not dead set against mechanical items, I just like to explore the greatest number of options, that's all.

What say you, Oh Wizardly One?





sumgai

[Yogi B]

Sept 23, 2022 23:23:46 GMT -5 sumgai said:

OK, I think I can help here. But be aware that I'm suffering another kidney stone, and boy oh boy, every time I get one of these, the drugs just get better and better.

Betcha they don't even list "may impede one's ability to answer silly electronics questions on guitar fora" on the list of side-effects. More seriously, I do hope you're not having too rough a time of it.

Are you in love with mechanical contact relays? If not, or at least not completely so, then would you consider a digital solution? And of course, there's the bit about power-loss bypass, which cannot be implemented via digital, it pretty much must be a mechanical relay.... which puts us in the territory of a hybrid solution. What ratio of mechanical versus solid state remains to be seen, of course.

I assume you're not talking about a hybrid system involving a non-latching relay, as you'd still have to pay the current cost during normal operation. Possibly for both effect on & bypass, unless the relay is also switched when the effect is toggled — and at that point it's more an augmented mechanical system, than a hybrid.

So instead, that'd mean a hybrid system with a latching relay: switching to disconnect input from output at power up (thus delegating to the solid-state switching), and re-establishing that link at power loss. There'd still be the need to detect the power state — though perhaps this simplifies things because that'd be the only stimulus the relay cared about, rather than both that and the footswitch.

And of course, there's the bit about power-loss bypass, which cannot be implemented via digital, it pretty much must be a mechanical relay....

That's true of the typical CMOS switches and the enhancement mode devices they're composed of — that's why last time I looked into solid state switching, I was thinking about using JFETs (or depletion mode MOSFETS) in the bypass path, paired with regular (enhancement mode) MOSFETs in the effect path. I don't think I've ever seen an example of something like that. The (in)famous Boss/Ibanez bypass does use JFETs, but in both the bypass & effect out signal paths — plus they're sandwiched between the input & output buffers thereby ensuring you wouldn't have output without power anyway.

The 'buffer sandwich' also (somewhat) sidesteps the problem of biasing the FETs so as they remain in the correct state (on/off) for both the full positive & negative half-cycles of the signal. This will require caps either side as well as pull-up/pull-down resistors — components which will be in the bypass signal path, thus ideally would be as large as possible in order to negate their capability as a tone-suck. However, I also thought about a possible situation of running one pedal full-tilt into another (perhaps even with a decrease in supply voltage between the two — e.g. the first running on 18V, the second on only 9V). In this situation we want to allow the input cap to charge as quickly as possible (in order that the FET becomes correctly biased quickly), thus want RC as small as possible (plus diodes in series with the pull-up/pull-down resistors). And, although I could well be missing a trick here, at the time the conflict in requirements made me want to stick to relays.

Since then I have remembered that optoFETs (and solid-state relays based around them) exist, which alleviates the need for external biasing, at the expense of requiring much more current than a plain FET switch (since enough current is required to light the LED(s)). Thus, current-wise, more-or-less puts them on par with the (non-latching) Panasonic relays I mentioned in my previous post. Another possible snag is (at least amongst the devices I've looked at) the normally-closed SSRs turn off slower and on quicker than their normally-open equivalents turn on and turn off, respectively. Therefore, if simultaneously applying/removing current to both LEDs, resulting in a make-before-break switch.

[sumgai]

Yogi (and all who PM'ed me),


I had the stone removed on Tuesday last, that went fine. But the after-effects are about a half-point less painful than the initial onset of pain in the first place! Fortunately, the drugs are doing their job reasonably well, but like right now, it's taken me a solid 5 minutes to scribble this reply, I'm just so far away from being up to snuff.

I need to get over this once and for all, and off the drugs permanently, before I can take up a meaningful discussion. Hell, I have to admit, everything you just said is sailing over my head by several feet, that's how much I've become impaired. But I've been through this before, I'll come out on the other side again, make no mistake.

To all and sundry, thanks for the well-wishes!





sumgai

[Yogi B]

Sept 29, 2022 13:53:46 GMT -5 sumgai said:

everything you just said is sailing over my head by several feet

Alternatively, whilst you may be able to see the keel of a sailboat pass overhead, at the same time the hull obscures a crew that's just glad not to have noticeably run into any rocks so far.

Though I have now had the opportunity to think over some of what I said:

Sept 29, 2022 2:30:29 GMT -5 Yogi B said:

...the problem of biasing the FETs so as they remain in the correct state (on/off) for both the full positive & negative half-cycles of the signal. This will require caps either side as well as pull-up/pull-down resistors — components which will be in the bypass signal path...

This is still fundamentally true, but 'require' kinda implies extra and that's not necessarily true. The signal should already be biased at ground thanks to the input/output caps and associated pulldown resistors of the surrounding effects. Noting that, and using reverse polarities to those in the Boss/Ibanez switching, we have the below:

I could well be missing a trick here

A puzzle piece I definitely wasn't accounting for was junction capacitance. Its existence, paired with the back-to-back combination of the FET & diode, means that V_G can be higher than both V_S and V_CTRL. That'll help but I don't think that's the full answer, because presumably this additional voltage is dependent upon both both the frequency of the input signal, and the FET & diode leakage currents.